Ddc Port C; Ddc Port D; Figure 142: Internal E-Edid And Hdcp Registers Access From Port C; Figure 143: Internal E-Edid And Hdcp Registers Access From Port D - Analog Devices ADV7850 Hardware Manual

DDC Port C

14.2.5
The DDC lines of the HDMI port C comprise the DDCC_SCL and DDCC_SDA pins. An HDMI host connected to the DDC port C
accesses the internal E-EDID at address 0xA0 in read-only mode, and the HDCP registers at address 0x74 in read/write mode (refer to
Figure 142). The internal E-EDID for port C is described in Section
Refer to the High-bandwidth Digital Content Protection (HDCP) System Specifications for detailed information on the HDCP registers.

DDC Port D

14.2.6
The DDC lines of the HDMI port D comprise the DDCC_SCL and DDCC_SDA pins. An HDMI host connected to the DDC port D
accesses the internal E-EDID at address 0xA0 in read-only mode, and the HDCP registers at address 0x74 in read/write mode (refer to
Figure 143). The internal E-EDID for port D is described in Section
Refer to the High-bandwidth Digital Content Protection (HDCP) System Specifications for detailed information on the HDCP registers.
Rev. A May 2012

Figure 142: Internal E-EDID and HDCP Registers Access from Port C

Figure 143: Internal E-EDID and HDCP Registers Access from Port D

7.10.
7.10.
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ADV7850