Clamp Operation; Figure 79: Position Of Voltage Clamp Window - Analog Devices ADV7850 Hardware Manual

9.2 CLAMP OPERATION

For analog signals that enter the CP block, there are two clamp methods applied to the video signal:
• An analog voltage clamp block prior to the ADCs
• A digital fine clamp that operates after the DPP block
The analog voltage clamp signal operates on the input video prior to digitization.
lines where the voltage clamp switches on. The position of the window is changed automatically (depending on
vid_std[5:0]) to suit the video standard in question.
Analog Video
Input
Voltage Clamp Control
Signal
The CP contains a digital fine clamp block. Its main purposes are:
• To compensate for variations of the voltage clamps in the analog domain
• To allow a clamp to operate even if the input signal is coming from a digital source, for example, external ADC
The digital fine clamp operates in three separate feedback loops, one for each channel. The incoming video signal level is measured at the
back porch. The level error, that is, clamp error, is compensated for by subtracting or adding a digital number to the datastream.
The digital clamp loop can be operated in an automatic or a manual mode with the following options:
•
The clamp values for channels B and C can be set manually. This is the recommended mode.
•
The clamp value is determined automatically on a line-by-line basis.
•
The clamp loops can be frozen. This means that the currently active offsets will no longer be updated but will be applied
permanently.
• The clamp value for channel A can be set manually (static value).
Note: The target clamp level for black input is a digital code of 0. This is to facilitate the highest possible signal to noise ratio (SNR). Some
interfaces, for example, ITU-R. BT656, require black to correspond to a value other than 0. To facilitate this, there is an additional
independent offset adder block after the gain multipliers for which separate fixed offset values can be supplied. Refer to Section
additional information.
clmp_freeze Freeze Digital Clamp, CP Map, Address 0x6C, [5]
The clmp_freeze bit stops the three digital fine clamp loops for channels A, B, and C from updating. The currently active clamp values are
applied continuously. All three loops are affected together; it is not possible to freeze the clamps for the channels individually.
clmp_freeze, Addr 44 (CP), Address 0x6C[5]
This control is used to stop the digital fine clamp loops for channels A, B and C from updating.
Function
clmp_freeze
0 
1
To facilitate an external clamp loop for channel A, the internal clamp value determined by the digital fine clamp block can be overridden
by a manual value programmed in the I
Rev. A May 2012

Figure 79: Position of Voltage Clamp Window

Description
Clamp value updated on every active video line
Clamp loops stopped and not updated
C. The two corresponding control values are clmp_a_man and clmp_a[11:0].
2
Figure 79 shows the position within the active video
242
ADV7850
prim_mode[3:0] and
9.4 for