Analog Devices ADV7850 Hardware Manual page 269

• ch1_hs_act is set to 1 if the SSPD has detected eight edges or four periods on the HSync signal
• ch1_hs_act is set to 0 if the SSPD has detected less than eight edges or four periods on the HSync signal
ch2_hs_act, Addr 44 (CP), Address 0x4F[4] (Read Only)
This readback displays activity on the HSync/CSync input to sync channel 2 SSPD.
Function
ch2_hs_act
0 
1
ch1_cur_pol_vs, Addr 44 (CP), Address 0xB5[5] (Read Only)
This readback indicates polarity on the HSync/CSync input to sync channel 1 SSPD.
Function
ch1_cur_pol_vs
0 
1
ch2_cur_pol_vs, Addr 44 (CP), Address 0x4F[5] (Read Only)
This readback displays the polarity of the VSync input to sync channel 2 SSPD.
Function
ch2_cur_pol_vs
0 
1
ch1_vs_act, Addr 44 (CP), Address 0xB5[6] (Read Only)
This readback indicates activity on VSync input to sync channel 1 SSPD.
Function
ch1_vs_act
0 
1
The SSPD section continuously monitors the VSync input signal over timing windows of 2
ch1_vs_act is updated at the end of each window, as follows:
• ch1_vs_act is set to 1 if the SSPD detected four edges or two periods on the VSync signal
•
ch1_vs_act is set to 0 if the SSPD detected less than four edges or two periods on the VSync signal
ch2_vs_act, Addr 44 (CP), Address 0x4F[6] (Read Only)
This readback indicates the activity on the VSync input to sync channel 2 SSPD.
Rev. A May 2012
Description
No activity detected on HSync/CSync input to sync channel 2 SSPD
HSync/CSync input to sync channel 2 SSPD carries an active signal
Description
VSync input to sync channel 1 SSPD has negative polarity signal
VSync input to sync channel 1 SSPD has positive polarity signal
Description
VSync input to sync channel 2 SSPD has negative polarity signal
VSync input to sync channel 2 SSPD has positive polarity signal
Description
No activity detected on VSync input to sync channel 1 SSPD
VSync input to sync channel 1 SSPD carries an active signal
crystal clock periods (refer to
22
269
ADV7850
Figure 89).