Sspd Readback Signals - Analog Devices ADV7850 Hardware Manual

emb_sync_on_all, Addr 44 (CP), Address 0x67[5]
This control is used to alter the gain computed by the AGC based on the presence of an embedded synchronization on channels A, B
and C. It is used only in the case of RGB input and RGB output with color controls enabled.
Function
emb_sync_on_all
0 
1
ch1_sspd_pp_en, Addr 44 (CP), Address 0x84[1]
This control is used to enable sync channel 1 SSPD post processing.
Function
ch1_sspd_pp_en
0 
1
ch2_sspd_pp_en, Addr 44 (CP), Address 0x41[0]
This control is used to enable sync channel 2 SSPD post processing. Activity on the embedded signal input to sync channel 2 SSPD is
reported by ch2_rs_active. Post processing of the synchronization signal input to sync channel 2 SSPD works only if the embedded
synchronization signal and the HSync/CSync and VSync signals have the same timing.
Function
ch2_sspd_pp_en
0 
1

9.7.1.1 SSPD Readback Signals

ch1_sspd_dvalid, Addr 44 (CP), Address 0xB5[7] (Read Only)
This control is set to 1 when the readbacks from the SSPD section of the synchronization sync channel 1 are valid. It is set to 1 after
2^22 crystal clock periods following a reset of the CP section. It is set to 0 when the device is reset.
Function
ch1_sspd_dvalid
0 
1
ch2_sspd_dvalid, Addr 44 (CP), Address 0x4F[7] (Read Only)
This control is set to 1 when the readbacks from the SSPD section of sync channel 2 are valid. It is set to 1 after 2^22 crystal clock
periods following a reset of the CP section. It is set to 0 when the DUT is reset.
Rev. A May 2012
Description
Embedded synchronization present only on luma channel (i.e. channel A)
All three input channels have embedded synchronization
Description
Disable post processing of synchronization signals input to sync channel 1 SSPD
Check for activity on embedded synchronization signal input to sync channel 1 SSPD when it
detects activity on HSync, CSync and VSync. Activity on embedded signal input to sync
channel 1 SSPD reported by ch1_rs_active. Post processing of synchronization signal input to
sync channel 1 SSPD works only if timing on embedded synchronization signal and timing on
HSync/CSync and VSync signals are same.
Description
Disable post processing of synchronization signals input to sync channel 2 SSPD
Check for activity on embedded synchronization signal input to sync channel 2 SSPD when it
detects activity on HSync/CSync and VSync
Description
Sync channel 1 SSPD results not valid for readback
Sync channel 1 SSPD results valid
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ADV7850