Analog Devices ADV7850 Hardware Manual page 276

Fast switching 4:1 hdmi 1.4 receiver with 3d-comb decoder and digitizer
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Function
ch1_lcvs[4:0]
xxxxx
ch2_lcvs[4:0], Addr 44 (CP), Address 0x4B[7:3] (Read Only)
This readback displays the sync channel 2 line count in a VSync. It displays the number of lines in a VSync period measured on sync
channel 2. The readback is valid if ch2_stdi_dvalid is set to 1.
Function
ch2_lcvs[4:0]
xxxxx
ch1_lcf[11:0], Addr 44 (CP), Address 0xA3[3:0]; Address 0xA4[7:0] (Read Only)
This readback displays the sync channel 1 line count in a field. The number of lines between two VSyncs is measured on sync channel 1.
The readback is valid if ch1_stdi_dvalid is set to 1.
Function
ch1_lcf[11:0]
xxxxxxxxxxx
ch2_lcf[11:0], Addr 44 (CP), Address 0x4B[2:0]; Address 0x4C[7:0]; Address 0x4D[7] (Read Only)
This readback displays the sync channel 2 line count in a field. It displays the number of lines between two VSyncs measured on sync
channel 2. The readback is valid if ch2_stdi_dvalid is set to 1.
Function
ch2_lcf[11:0]
xxxxxxxxxxx
ch1_fcl[12:0], Addr 44 (CP), Address 0xB8[4:0]; Address 0xB9[7:0] (Read Only)
This readback displays the sync channel 1 field count length. It displays the number of crystal clock cycles between successive VSyncs
measured by sync channel 1 STDI or in 1/256th of a field. The readback from this field is valid if ch1_stdi_dvalid is set.
Function
ch1_fcl[12:0]
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ch2_fcl[12:0], Addr 44 (CP), Address 0x4D[4:0]; Address 0x4E[7:0] (Read Only)
This readback displays the sync channel 2 field count length. The number of crystal clock cycles between successive VSyncs is measured
by sync channel 2 STDI or in 1/256th of a field. The readback is valid if ch2_stdi_dvalid is set to 1.
Function
ch2_fcl[12:0]
xxxxxxxxxxxxx
ch1_stdi_intlcd, Addr 44 (CP), Address 0xB1[6] (Read Only)
This readback displays interlaced versus progressive mode detected by sync channel 1 STDI. The readback is valid if ch1_stdi_dvalid is
set to 1.
Rev. A May 2012
Description
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ADV7850

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