Serial peripheral interface (SPI)
Figure 273. MSB justified 16-bit extended to 32-bit packet frame with CPOL = 0
CK
WS
SD
LSB justified standard
This standard is similar to the MSB justified standard (no difference for the 16-bit and 32-bit
full-accuracy frame formats).
CK
WS
SD
•
In transmission mode:
If data 0x3478AE have to be transmitted, two write operations to the SPI_DR register
are required from software or by DMA. The operations are shown below.
714/1378
Transmission
16-bit data
MSB
Figure 274. LSB justified 16-bit or 32-bit full-accuracy with CPOL = 0
CK
WS
Transmission
16- or 32-bit data
SD
MSB
Channel left
Figure 275. LSB justified 24-bit frame length with CPOL = 0
8-bit data
0 forced
Reception
16-bit remaining
0 forced
LSB
Channel left 32-bit
Reception
LSB
MSB
Channel right
Transmission
24-bit remaining
MSB
Channel left 32-bit
RM0033 Rev 8
Channel right
Reception
LSB
Channel right
RM0033
MS30102V1
MS30103V1
MS30104V1
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