Figure 216. I2C Bus Protocol - ST STM32F205 series Reference Manual

Inter-integrated circuit (I2C) interface
Data and addresses are transferred as 8-bit bytes, MSB first. The first byte(s) following the
start condition contain the address (one in 7-bit mode, two in 10-bit mode). The address is
always transmitted in Master mode.
A 9th clock pulse follows the 8 clock cycles of a byte transfer, during which the receiver must
send an acknowledge bit to the transmitter. Refer to
SDA
SCL
Acknowledge may be enabled or disabled by software. The I
addressing 7-bit/ 10-bit and/or general call address) can be selected by software.
The block diagram of the I
600/1378
Figure 216. I
MSB
1
Start
condition
2
C interface is shown in
RM0033 Rev 8
Figure
2
C bus protocol
2 8
Figure
216.
ACK
9
Stop
condition
2
C interface addresses (dual
217.
RM0033
MS19854V1