Table 40. Adc Register Map And Reset Values (Common Adc Registers) - ST STM32F205 series Reference Manual

RM0033

Table 40. ADC register map and reset values (common ADC registers)

Offset Register
ADC_CSR
0x00
Reset value
ADC_CCR
0x04
Reset value
ADC_CDR
0x08
Reset value 0
Refer to
Reserved
Reserved
0
Regular DATA2[15:0]
0 0 0 0 0 0 0 0
Section 2.3: Memory map
0 0 0 0 0 0
ADC3
Reserved
0 0 0 0 0
0 0 0 0 0 0 0 0 0
for the register boundary addresses.
RM0033 Rev 8
Analog-to-digital converter (ADC)
0 0 0 0 0 0 0
ADC2
DELAY [3:0]
Reserved
0 0 0 0 0
Regular DATA1[15:0]
0 0 0 0 0 0 0 0 0
0 0 0 0 0
ADC1
MULTI [4:0]
0 0 0 0 0
0 0 0 0 0
255/1378
255