Timer Synchronization (Tim9/12); Debug Mode - ST STM32F205 series Reference Manual

General-purpose timers (TIM9 to TIM14)
15.3.12

Timer synchronization (TIM9/12)

The TIM timers are linked together internally for timer synchronization or chaining. Refer to
Section 14.3.15: Timer synchronization
Note: The clock of the slave timer must be enabled prior to receive events from the master timer,
and must not be changed on-the-fly while triggers are received from the master timer.
15.3.13

Debug mode

When the microcontroller enters debug mode (Cortex
either continues to work normally or stops, depending on DBG_TIMx_STOP configuration
bit in DBG module. For more details, refer to
watchdog, bxCAN and I
458/1378
for details.
Section 32.16.2: Debug support for timers,
2
C.
RM0033 Rev 8
®
-M3 core halted), the TIMx counter
RM0033