Figure 261. Transmission Using Dma; Figure 262. Reception Using Dma - ST STM32F205 series Reference Manual

Serial peripheral interface (SPI)
Example with CPOL=1, CPHA=1
SCK
MISO/MOSI (out)
TXE flag
BSY flag
DMA request
Tx buffer
(write to SPI_DR)
DMA writes to SPI_DR
DMA TCIF flag
(DMA transfer complete)
software configures the DMA writes
DMA SPI Tx channel DATA1 into
to send 3 data items
and enables the SPI
Example with CPOL=1, CPHA=1
SCK
MISO/MOSI (in)
RXNE flag
DMA request
Rx buffer
(read from SPI_DR)
DMA read from SPI_DR
flag DMA TCIF
(DMA transfer complete)
software configures the
DMA SPI Rx channel
to receive 3 data items
and enables the SPI
706/1378

Figure 261. Transmission using DMA

DATA 1 = 0xF1
b0 b1 b2 b3 b4 b5 b6 b7 b0 b1 b2 b3 b4 b5 b6 b7 b0 b1 b2 b3 b4 b5 b6 b7
set by hardware
cleared by DMA write
set by hardware
0xF1 0xF2
set by hardware
DMA writes DMA writes
DATA2 into DATA3 into
SPI_DR SPI_DR SPI_DR

Figure 262. Reception using DMA

DATA 1 = 0xA1
b0 b1 b2 b3 b4 b5 b6 b7 b0 b1 b2 b3 b4 b5 b6 b7 b0 b1 b2 b3 b4 b5 b6 b7
set by hardware
DMA reads
DATA1 from
SPI_DR
DATA 2 = 0xF2
set by hardware
clear by DMA write
0xF3
clear by software
DMA transfer is software waits
complete (TCIF=1 in until TXE=1
DMA_ISR)
DATA 2 = 0xA2
clear by DMA read
0xA1
DMA reads
DATA2 from
SPI_DR
RM0033 Rev 8
DATA 3 = 0xF3
set by hardware
ignored by the DMA because
DMA transfer is complete
software waits until BSY=0
DATA 3 = 0xA3
0xA2
set by hardware
DMA reads The DMA transfer is
DATA3 from complete (TCIF=1 in
SPI_DR DMA_ISR)
RM0033
reset
by hardware
ai17349
0xA3
clear
by software
ai17350