Receiver; Figure 227. Start Bit Detection When Oversampling By 16 Or 8 - ST STM32F205 series Reference Manual

Advanced arm-based 32-bit mcus

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Idle characters

Setting the TE bit drives the USART to send an idle frame before the first data frame.

Receiver

The USART can receive data words of either 8 or 9 bits depending on the M bit in the

USART_CR1 register.

Start bit detection

The start bit detection sequence is the same when oversampling by 16 or by 8.

In the USART, the start bit is detected when a specific sequence of samples is recognized.

This sequence is: 1 1 1 0 X 0 X 0 X 0 0 0 0.

If the sequence is not complete, the start bit detection aborts and the receiver returns to the

idle state (no flag is set) where it waits for a falling edge.

The start bit is confirmed (RXNE flag set, interrupt generated if RXNEIE=1) if the 3 sampled

bits are at 0 (first sampling on the 3rd, 5th and 7th bits finds the 3 bits at 0 and second

sampling on the 8th, 9th and 10th bits also finds the 3 bits at 0).

The start bit is validated (RXNE flag set, interrupt generated if RXNEIE=1) but the NE noise

flag is set if, for both samplings, at least 2 out of the 3 sampled bits are at 0 (sampling on the

Universal synchronous asynchronous receiver transmitter (USART)

RM0033 Rev 8

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