I/O Alternate Function Input/Output; External Interrupt/Wakeup Lines; Input Configuration - ST STM32F205 series Reference Manual

RM0033
The LOCK sequence (refer to
(GPIOx_LCKR) (x =
GPIOx_LCKR register due to the fact that GPIOx_LCKR bit 16 has to be set at the same
time as the [15:0] bits.
For more details please refer to LCKR register description in
configuration lock register (GPIOx_LCKR) (x =
6.3.7

I/O alternate function input/output

Two registers are provided to select one out of the sixteen alternate function inputs/outputs
available for each I/O. With these registers, you can connect an alternate function to some
other pin as required by your application.
This means that a number of possible peripheral functions are multiplexed on each GPIO
using the GPIOx_AFRL and GPIOx_AFRH alternate function registers. The application can
thus select any one of the possible functions for each I/O. The AF selection signal being
common to the alternate function input and alternate function output, a single channel is
selected for the alternate function input/output of one I/O.
To know which functions are multiplexed on each GPIO pin, refer to the datasheets.
Note: The application is allowed to select one of the possible peripheral functions for each I/O at a
time.
6.3.8

External interrupt/wakeup lines

All ports have external interrupt capability. To use external interrupt lines, the port must be
configured in input mode, refer to
Section 8.2.3: Wakeup event
6.3.9

Input configuration

When the I/O port is programmed as Input:
•
the output buffer is disabled
•
the Schmitt trigger input is activated
•
the pull-up and pull-down resistors are activated depending on the value in the
GPIOx_PUPDR register
•
The data present on the I/O pin are sampled into the input data register every AHB1
clock cycle
•
A read access to the input data register provides the I/O State
Figure 15
Section 6.4.8: GPIO port configuration lock register
A..I)) can only be performed using a word (32-bit long) access to the
management.
shows the input configuration of the I/O port bit.
A..I).
Section 8.2: External interrupt/event controller (EXTI)
RM0033 Rev 8
General-purpose I/Os (GPIO)
Section 6.4.8: GPIO port
and
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