Adaptive Real-Time Memory Accelerator (Art Accelerator™); Boot Configuration; Table 4. Boot Modes - ST STM32F205 series Reference Manual

Memory and bus architecture
Bit 8 PRFTEN: Prefetch enable
Bits 7:3 Reserved, must be kept cleared.
Bits 2:0 LATENCY: Latency
2.3.5 Adaptive real-time memory accelerator (ART Accelerator™)
The ART Accelerator™ is a memory accelerator which is optimized for STM32 industry-
standard Arm
®
the Arm
processor to wait for the Flash memory at higher operating frequencies. Thanks to the ART
Accelerator™, the CPU can operate up to 120 MHz without wait states, thereby increasing
the overall system speed and efficiency.
To release the processor full 150 DMIPS performance at this frequency the accelerator
implements an instruction prefetch queue and branch cache, which enables program
execution from Flash memory at up to 120 MHz without wait states.
2.4

Boot configuration

Due to its fixed memory map, the code area starts from address 0x0000 0000 (accessed
through the ICode/DCode buses) while the data area (SRAM) starts from address
0x2000 0000 (accessed through the system bus). The Cortex
reset vector on the ICode bus, which implies to have the boot space available only in the
code area (typically, Flash memory). STM32F20x and STM32F21x microcontrollers
implement a special mechanism to be able to boot from other memories (like the internal
SRAM).
In the STM32F20x and STM32F21x, three different boot modes can be selected through the
BOOT[1:0] pins as shown in
Boot mode selection pins
BOOT1
x
0
1
58/1378
0: Prefetch is disabled
1: Prefetch is enabled
These bits represent the ratio of the CPU clock period to the Flash memory access time.
000: Zero wait state
001: One wait state
010: Two wait states
011: Three wait states
100: Four wait states
101: Five wait states
110: Six wait states
111: Seven wait states
® ®
Cortex -M3 processors. It balances the inherent performance advantage of
®
Cortex -M3 over Flash memory technologies, which normally requires the
Table
BOOT0
0 Main Flash memory Main Flash memory is selected as the boot space
1 System memory
1 Embedded SRAM
4.

Table 4. Boot modes

Boot mode
System memory is selected as the boot space
Embedded SRAM is selected as the boot space
RM0033 Rev 8
®
-M3 CPU always fetches the
Aliasing
RM0033