Rcc Ahb2 Peripheral Reset Register (Rcc_Ahb2Rstr) - ST STM32F205 series Reference Manual

Advanced arm-based 32-bit mcus
Hide thumbs Also See for STM32F205 series:
Table of Contents

Advertisement

Reset and clock control (RCC)
5.3.6

RCC AHB2 peripheral reset register (RCC_AHB2RSTR)

Address offset: 0x14
Reset value: 0x0000 0000
Access: no wait state, word, half-word and byte access
31
30
29
15
14
13
Bits 31:8
Reserved, always read as 0.
Bit 7 OTGFSRST: USB OTG FS module reset
Set and cleared by software.
0: does not reset the USB OTG FS module
1: resets the USB OTG FS module
Bit 6 RNGRST: Random number generator module reset
Set and cleared by software.
0: does not reset the random number generator module
1: resets the random number generator module
Bit 5 HASHRST: Hash module reset
Set and cleared by software.
0: does not reset the HASH module
1: resets the HASH module
Bit 4 CRYPRST: Cryptographic module reset
Set and cleared by software.
0: does not reset the cryptographic module
1: resets the cryptographic module
Bit 3:1
Reserved, always read as 0
Bit 0 DCMIRST: Camera interface reset
Set and cleared by software.
0: does not reset the Camera interface
1: resets the Camera interface
106/1378
28
27
26
25
12
11
10
9
Reserved
24
23
22
Reserved
8
7
6
OTGFS
RNG
HASH
RST
RST
RST
rw
rw
RM0033 Rev 8
21
20
19
18
5
4
3
2
CRYP
Reserved
RST
rw
rw
RM0033
17
16
1
0
DCMI
RST
rw

Advertisement

Table of Contents
loading
Need help?

Need help?

Do you have a question about the STM32F205 series and is the answer not in the manual?

Questions and answers

This manual is also suitable for:

Stm32f207 seriesStm32f215 seriesStm32f217 series

Table of Contents