Rtc Calibration Register (Rtc_Calibr) - ST STM32F205 series Reference Manual

Real-time clock (RTC)
Bits 31:16 Reserved
Bits 15:0 WUT[15:0]: Wakeup auto-reload value bits
Note: The first assertion of WUTF occurs (WUT+1) ck_wut cycles after WUTE is set. Setting
Note: This register can be written only when WUTWF is set to 1 in RTC_ISR.
This register is write protected. The write access procedure is described in
write protection on page
22.6.7

RTC calibration register (RTC_CALIBR)

Address offset: 0x18
Backup domain reset value: 0x0000 0000
System reset: not affected
31 30 29
15 14 13
Bits 31:8 Reserved
Bit 7 DCS: Digital calibration sign
Bits 6:5 Reserved, must be kept at reset value.
Bits 4:0 DC[4:0]: Digital calibration
590/1378
When the wakeup timer is enabled (WUTE set to 1), the WUTF flag is set every (WUT[15:0]
+ 1) ck_wut cycles. The ck_wut period is selected through WUCKSEL[2:0] bits of the
RTC_CR register
When WUCKSEL[2] = 1, the wakeup timer becomes 17-bits and WUCKSEL[1] effectively
becomes WUT[16] the most-significant bit to be reloaded into the timer.
WUT[15:0] to 0x0000 with WUCKSEL[2:0] =011 (RTCCLK/2) is forbidden.
574.
28 27 26 25
12 11 10 9
Reserved
0: Positive calibration: calendar update frequency is increased
1: Negative calibration: calendar update frequency is decreased
DCS = 0 (positive calibration)
00000: + 0 ppm
00001: + 4 ppm (rounded value)
00010: + 8 ppm (rounded value)
..
11111: + 126 ppm (rounded value)
DCS = 1 (negative calibration)
00000: − 0 ppm
00001: − 2 ppm (rounded value)
00010: − 4 ppm (rounded value)
..
11111: − 63 ppm (rounded value)
Refer to Case of RTCCLK=32.768 kHz and PREDIV_A+1=128 on page 578
step value.
24 23 22
Reserved
8 7 6
DCS
Reserved
rw
RM0033 Rev 8
RTC register
21 20 19 18
5 4 3 2
DC[4:0]
rw rw rw
RM0033
17 16
1 0
rw rw
for the exact