Figure 225. Configurable Stop Bits - ST STM32F205 series Reference Manual

RM0033
Procedure:
1. Enable the USART by writing the UE bit in USART_CR1 register to 1.
2. Program the M bit in USART_CR1 to define the word length.
3. Program the number of stop bits in USART_CR2.
4. Select DMA enable (DMAT) in USART_CR3 if Multi buffer Communication is to take
place. Configure the DMA register as explained in multibuffer communication.
5. Select the desired baud rate using the USART_BRR register.
6. Set the TE bit in USART_CR1 to send an idle frame as first transmission.
7. Write the data to send in the USART_DR register (this clears the TXE bit). Repeat this
for each data to be transmitted in case of single buffer.
8. After writing the last data into the USART_DR register, wait until TC=1. This indicates
that the transmission of the last frame is complete. This is required for instance when
the USART is disabled or enters the Halt mode to avoid corrupting the last
transmission.
Single byte communication
Clearing the TXE bit is always performed by a write to the data register.
The TXE bit is set by hardware and it indicates:
•
The data has been moved from TDR to the shift register and the data transmission has
started.
•
The TDR register is empty.
• The next data can be written in the USART_DR register without overwriting the
previous data.
This flag generates an interrupt if the TXEIE bit is set.
Universal synchronous asynchronous receiver transmitter (USART)

Figure 225. Configurable stop bits

8-bit Word length (M bit is reset)
Data frame
Start
Bit0 Bit1 Bit2
Bit
CLOCK
a) 1 Stop Bit
Data frame
Start
Bit0 Bit1 Bit2
Bit
b) 1 1/2 stop Bits
Data frame
Start
Bit0 Bit1 Bit2
Bit
c) 2 Stop Bits
Data frame
Start
Bit0 Bit1 Bit2
Bit
d) 1/2 Stop Bit
Possible
parity
Bit3 Bit4 Bit5 Bit6
Possible
Parity
Bit3 Bit4 Bit5 Bit6
Possible
parity
Bit3 Bit4 Bit5 Bit6
Possible
parity
Bit3 Bit4 Bit5 Bit6
RM0033 Rev 8
Next data frame
bit
Next
start
Stop
Bit7
bit
****
**
** LBCL bit controls last data clock pulse
Next data frame
Bit
Next
start
Bit7
bit
1 1/2 stop bits
Next data frame
bit
Next
Start
2 Stop Bits
Bit7
Bit
Next data frame
bit
Next
Start
Bit7
Bit
1/2 Stop Bit
MSv42088V1
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