Oversampling By 8 - ST STM32F205 series Reference Manual

RM0033
Table 86. Error calculation for programmed baud rates at f
Baud rate
S.No Desired
1 1.2 KBps
2 2.4 KBps
3 9.6 KBps
4 19.2 KBps
5 38.4 KBps
6 57.6 KBps
7 115.2 KBps
8 230.4 KBps
9 460.8 KBps
10 921.6 KBps
11 2 MBps
12 3 MBps
1. The lower the CPU clock the lower the accuracy for a particular baud rate. The upper limit of the achievable baud rate can
be fixed with these data.
Table 87. Error calculation for programmed baud rates at f
Baud rate
S.No Desired
1 1.2 KBps
2 2.4 KBps
3 9.6 KBps
4 19.2 KBps
5 38.4 KBps
6 57.6 KBps
Universal synchronous asynchronous receiver transmitter (USART)

oversampling by 8

Oversampling by 8 (OVER8 = 1)
f = 8 MHz
PCLK
Value
programmed
Actual
in the baud
rate register
1.2 KBps 833.375
2.4 KBps 416.625
9.604 KBps 104.125
19.185 KBps 52.125
38.462 KBps 26
57.554 KBps 17.375
115.942 KBps 8.625
228.571 KBps 4.375
470.588 KBps 2.125
888.889 KBps 1.125
NA NA
NA NA
oversampling by 16
Oversampling by 16 (OVER8 = 0)
= 16 MHz
f PCLK
Value
programmed
Actual
in the baud
rate register
1.2 KBps 833.3125
2.4 KBps 416.6875
9.598 KBps 104.1875
19.208 KBps 52.0625
38.369 KBps 26.0625
57.554 KBps 17.375
PCLK
(1)
% Error =
(Calculated -
Desired)
B.rate /
Desired
B.rate
0
0.01
0.04
0.08
0.16
0.08
0.64
0.79
2.12
3.55
NA
NA
PCLK
(1)
% Error =
(Calculated -
Desired) B.rate /
Desired B.rate
0
0
0.02
0.04
0.08
0.08
RM0033 Rev 8
= 8 MHz or f
PCLK
f = 12 MHz
PCLK
Value
programmed
Actual
in the baud
rate register
1.2 KBps 1250
2.4 KBps 625
9.6 KBps 156.25
19.2 KBps 78.125
38.339 KBps 39.125
57.692 KBps 26
115.385 KBps 13
230.769 KBps 6.5
461.538 KBps 3.25
923.077 KBps 1.625
NA NA
NA NA
= 16 MHz or f
PCLK
= 24 MHz
f PCLK
Value
programmed
Actual
in the baud
rate register
1.2 1250
2.4 625
9.6 156.25
19.2 78.125
38.4 39.0625
57.554 26.0625
=12 MHz,
% Error
0
0
0
0
0.16
0.16
0.16
0.16
0.16
0.16
NA
NA
= 24 MHz,
% Error
0
0
0
0
0
0.08
647/1378
682