Cryp Register Map; Table 75. Cryp Register Map And Reset Values - ST STM32F205 series Reference Manual

Cryptographic processor (CRYP)
CRYP_IV1LR (address offset: 0x48)
31 30 29
IV64 IV65 IV66 IV67
rw rw rw
15 14 13
IV80 IV81 IV82 IV83
rw rw rw
CRYP_IV1RR (address offset: 0x4C)
31 30 29
IV96 IV97 IV98 IV99
rw rw rw
15 14 13
IV112 IV113 IV114 IV115
rw rw rw
Note: In DES/3DES modes, only CRYP_IV0(L/R) is used.
Write access to these registers are disregarded when the cryptographic processor is busy
(bit BUSY = 1 in the CRYP_SR register).
19.6.11

CRYP register map

Register
Offset name and
reset value
CRYP_CR
0x00
0x00
Reset value
CRYP_SR
0x04
Reset value
CRYP_DIN
0x08
Reset value
CRYP_DOUT
0x0C
Reset value
CRYP_DMAC
R
0x10
Reset value
542/1378
28 27 26 25
IV68 IV69 IV70
rw rw rw rw
12 11 10 9
IV84 IV85 IV86
rw rw rw rw
28 27 26 25
IV100 IV101 IV102
rw rw rw rw
12 11 10 9
IV116 IV117 IV118
rw rw rw rw

Table 75. CRYP register map and reset values

Reserved
24 23 22
IV71 IV72 IV73
rw rw rw
8 7 6
IV87 IV88 IV89
rw rw rw
24 23 22
IV103 IV104 IV105 IV106
rw rw rw
8 7 6
IV119 IV120 IV121 IV122
rw rw rw
0 0
Reserved
DATAIN
DATAOUT
Reserved
RM0033 Rev 8
21 20 19 18
IV74 IV75 IV76 IV77
rw rw rw rw
5 4 3 2
IV90 IV91 IV92 IV93
rw rw rw rw
21 20 19 18
IV107 IV108 IV109
rw rw rw rw
5 4 3 2
IV123 IV124 IV125
rw rw rw rw
Reserved
0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0 0 0 0 0
RM0033
17 16
IV78 IV79
rw rw
1 0
IV94 IV95
rw rw
17 16
IV110 IV111
rw rw
1 0
IV126 IV127
rw rw
0 0 0 1 1
0 0