Wwdg Register Map - ST STM32F205 series Reference Manual

Advanced arm-based 32-bit mcus
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RM0033
18.6.4

WWDG register map

The following table gives the WWDG register map and reset values.
Offset
Register
WWDG_CR
0x00
Reset value
WWDG_CFR
0x04
Reset value
WWDG_SR
0x08
Reset value
Refer to
Table 72. WWDG register map and reset values
Section 3.3: Memory map
Reserved
Reserved
Reserved
for the register boundary addresses.
RM0033 Rev 8
Window watchdog (WWDG)
T[6:0]
0
1
1
1
1
W[6:0]
0
0
0
1
1
1
1
507/1378
1
1
1
1
1
1
0
507

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