Aes Cryptographic Core; Figure 199. Des/Tdes-Cbc Mode Decryption - ST STM32F205 series Reference Manual

RM0033
1. K: key; C: cipher text; I: input block; O: output block; Ps: plain text before swapping (when decoding) or
after swapping (when encoding); P: plain text; IV: initialization vectors.
19.3.2

AES cryptographic core

The AES cryptographic core consists of three components:
• The AES algorithm (AEA: advanced encryption algorithm)
•
Multiple keys
• Initialization vector(s) or Nonce
The AES utilizes keys of 3 possible lengths: 128, 192 or 256 bits and, depending on the
operation mode used, zero or one 128-bit initialization vector (IV).
The basic processing involved in the AES is as follows: an input block of 128 bits is read
from the input FIFO and sent to the AEA to be encrypted using the key (K0...3). The key
format depends on the key size:
•
If Key size = 128: Key = [K3 K2]
•
If Key size = 192: Key = [K3 K2 K1]
•
If Key size = 256: Key = [K3 K2 K1 K0]
where Kx=[KxR KxL],R=right, L=left
According to the mode implemented, the resultant output block is used to calculate the
ciphertext.
FIPS PUB 197 (November 26, 2001) provides a thorough explanation of the processing
involved in the four operation modes supplied by the AES core: AES-ECB encryption, AES-

Figure 199. DES/TDES-CBC mode decryption

DATATYPE
K3
I is written back
into IV at the
same time as P
is pushed into
K2
the OUT FIFO
K1
AHB2 data write
(before CRYP
is enabled)
IV0(L/R)
DATATYPE
RM0033 Rev 8
Cryptographic processor (CRYP)
IN FIFO
ciphertext C
C, 64 bits
swapping
I, 64 bits
64
DEA, decrypt
64
DEA, encrypt
64
DEA, decrypt
O, 64 bits
64
+
Ps, 64 bits
swapping
P, 64 bits
OUT FIFO
plaintext P
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