Controller area network (bxCAN)
Master Control
Master Status
Tx Status
Rx FIFO 0 Status
Rx FIFO 1 Status
Interrupt Enabl e
Error Status
Bit Timing
Filter Master
Filter Mode
Filter Sc ale
Filter FIFO Ass ign
Filter Activation
CAN 2 (Sl a ve)
Master Control
Master Status
Tx Status
Rx FIFO 0 Status
Rx FIFO 1 Status
Interrupt Enable
Error Status
Bit Timing
27.4
bxCAN operating modes
bxCAN has three main operating modes: initialization, normal and Sleep. After a
hardware reset, bxCAN is in Sleep mode to reduce power consumption and an internal pull-
up is active on CANTX. The software requests bxCAN to enter initialization or Sleep mode
by setting the INRQ or SLEEP bits in the CAN_MCR register. Once the mode has been
entered, bxCAN confirms it by setting the INAK or SLAK bits in the CAN_MSR register and
the internal pull-up is disabled. When neither INAK nor SLAK are set, bxCAN is in normal
796/1378
Figure 298. Dual CAN block diagram
CAN 1 (Master) with 512 bytes SRAM
CAN 2.0B Active Core
CAN 2.0B Active Core
RM0033 Rev 8
Master
Tx Mailboxes
M
Re ceive FIFO 0
2
1
Mailbox 0
Mailbox 0
Transmission
Scheduler
Memory
Access
Filter
Controller
Transmission
Scheduler
R eceive FI F O 0
Slave
Tx Mailboxes
2
Mailbox 0
1
Mailbox 0
Note: CAN 2 start filter bank number n is conf i gurable by writing to
the CAN 2SB[ 5 :0] bits in the CAN _ FMR register.
RM0033
a
t s
r e
M
a
t s
r e
R eceive FIFO 1
2
1
Mailbox 0
Acceptance Filters
26
..
..
3
2
1
0
Master Filters
Slave Filters
(0 to 27)
(0 to 27)
Slave
Slave
Re ceive FIFO 1
2
1
Mailbox 0
ai16094b
2
1
27
2
1
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