Otg_Fs Interrupts - ST STM32F205 series Reference Manual

RM0033
–
As the OTG_FS core is able to fill in the 1.25 Kbyte RAM buffer very efficiently, and as
1.25 Kbyte of transmit/receive data is more than enough to cover a full speed frame, the
USB system is able to withstand the maximum full-speed data rate for up to one USB frame
(1 ms) without any CPU intervention.
29.15

OTG_FS interrupts

When the OTG_FS controller is operating in one mode, either device or host, the application
must not access registers from the other mode. If an illegal access occurs, a mode
mismatch interrupt is generated and reflected in the Core interrupt register (MMIS bit in the
OTG_FS_GINTSTS register). When the core switches from one mode to the other, the
registers in the new mode of operation must be reprogrammed as they would be after a
power-on reset.
Figure 357
It has a lot of empty space available in the receive buffer to autonomously fill it in
with the data coming from the USB
shows the interrupt hierarchy.
USB on-the-go full-speed (OTG_FS)
RM0033 Rev 8 981/1378
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