RM0033
24
Universal synchronous asynchronous receiver
transmitter (USART)
This section applies to the whole STM32F20x and STM32F21x family, unless otherwise
specified.
24.1
USART introduction
The universal synchronous asynchronous receiver transmitter (USART) offers a flexible
means of full-duplex data exchange with external equipment requiring an industry standard
NRZ asynchronous serial data format. The USART offers a very wide range of baud rates
using a fractional baud rate generator.
It supports synchronous one-way communication and half-duplex single wire
communication. It also supports the LIN (local interconnection network), Smartcard Protocol
and IrDA (infrared data association) SIR ENDEC specifications, and modem operations
(CTS/RTS). It allows multiprocessor communication.
High speed data communication is possible by using the DMA for multibuffer configuration.
24.2
USART main features
•
Full duplex, asynchronous communications
•
NRZ standard format (Mark/Space)
•
Configurable oversampling method by 16 or by 8 to give flexibility between speed and
clock tolerance
•
Fractional baud rate generator systems
–
•
Programmable data word length (8 or 9 bits)
•
Configurable stop bits - support for 1 or 2 stop bits
•
LIN Master Synchronous Break send capability and LIN slave break detection
capability
–
•
Transmitter clock output for synchronous transmission
•
IrDA SIR encoder decoder
–
•
Smartcard emulation capability
–
–
•
Single-wire half-duplex communication
•
Configurable multibuffer communication using DMA (direct memory access)
–
Universal synchronous asynchronous receiver transmitter (USART)
Common programmable transmit and receive baud rate of up to 7.5 Mbit/s when
the APB frequency is 60 MHz and oversampling is by 8
13-bit break generation and 10/11 bit break detection when USART is hardware
configured for LIN
Support for 3/16 bit duration for normal mode
The Smartcard interface supports the asynchronous protocol Smartcards as
defined in the ISO 7816-3 standards
0.5, 1.5 stop bits for Smartcard operation
Buffering of received/transmitted bytes in reserved SRAM using centralized DMA
RM0033 Rev 8
631/1378
682
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