Capture/Compare Channels; Figure 172. Capture/Compare Channel (Example: Channel 1 Input Stage) - ST STM32F205 series Reference Manual

RM0033
15.3.4

Capture/compare channels

Each Capture/Compare channel is built around a capture/compare register (including a
shadow register), a input stage for capture (with digital filter, multiplexing and prescaler) and
an output stage (with comparator and output control).
Figure 172
The input stage samples the corresponding TIx input to generate a filtered signal TIxF.
Then, an edge detector with polarity selection generates a signal (TIxFPx) which can be
used as trigger input by the slave mode controller or as the capture command. It is
prescaled before the capture register (ICxPS).

Figure 172. Capture/compare channel (example: channel 1 input stage)

TI1
Filter
f
DTS downcounter
ICF[3:0]
TIMx_CCMR1
The output stage generates an intermediate waveform which is then used for reference:
OCxRef (active high). The polarity acts at the end of the chain.
to Figure 174 give an overview of a capture/compare channel.
TI1F_Rising
TI1F
Edge
TI1F_Falling
detector
CC1P/CC1NP
TIMx_CCER
TI2F_Rising
(from channel 2)
TI2F_Falling
(from channel 2)
RM0033 Rev 8
General-purpose timers (TIM9 to TIM14)
TI1F_ED
To the slave mode controller
0
TI1FP1
01
1
TI2FP1
10
TRC
11
(from slave mode
controller)
0
CC1S[1:0]
1
TIMx_CCMR1
IC1PS
IC1 Divider
/1, /2, /4, /8
ICPS[1:0]
CC1E
TIMx_CCER
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