Dual Dac Channel Conversion; Figure 54. Dac Triangle Wave Generation; Figure 55. Dac Conversion (Sw Trigger Enabled) With Triangle Wave Generation - ST STM32F205 series Reference Manual

Advanced arm-based 32-bit mcus
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RM0033
It is possible to reset triangle wave generation by resetting the WAVEx[1:0] bits.
MAMPx[3:0] max amplitude
+ DAC_DHRx base value
DAC_DHRx base value

Figure 55. DAC conversion (SW trigger enabled) with triangle wave generation

APB1_CLK
DHR
DOR
SWTRIG
Note:
The DAC trigger must be enabled for noise generation by setting the TENx bit in the
DAC_CR register.
The MAMPx[3:0] bits must be configured before enabling the DAC, otherwise they cannot
be changed.
11.4

Dual DAC channel conversion

To efficiently use the bus bandwidth in applications that require the two DAC channels at the
same time, three dual registers are implemented: DHR8RD, DHR12RD and DHR12LD. A
unique register access is then required to drive both DAC channels at the same time.
Eleven possible conversion modes are possible using the two DAC channels and these dual
registers. All the conversion modes can nevertheless be obtained using separate DHRx
registers if needed.
All modes are described in the paragraphs below.

Figure 54. DAC triangle wave generation

0
0x00
0xAAA
RM0033 Rev 8
Digital-to-analog converter (DAC)
0xD55
ai14715c
ai14714b
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