ST STM32F205 series Reference Manual page 52

Advanced arm-based 32-bit mcus

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Table of Contents

Memory and bus architecture

Table 1. STM32F20x and STM32F21x register boundary addresses (continued)

Boundary address

0x4001 4800 - 0x4001 4BFF

0x4001 4400 - 0x4001 47FF

0x4001 4000 - 0x4001 43FF

0x4001 3C00 - 0x4001 3FFF

0x4001 3800 - 0x4001 3BFF

0x4001 3000 - 0x4001 33FF

0x4001 2C00 - 0x4001 2FFF

0x4001 2000 - 0x4001 23FF

0x4001 1400 - 0x4001 17FF

0x4001 1000 - 0x4001 13FF

0x4001 0400 - 0x4001 07FF

0x4001 0000 - 0x4001 03FF

ADC1 - ADC2 - ADC3

RM0033 Rev 8

Section 15.5.12: TIM10/11/13/14 register map on

Section 15.4.14: TIM9/12 register map on

Section 8.3.7: EXTI register map on page 175

Section 7.2.8: SYSCFG register map on page 163

Section 25.5.10: SPI register map on page 735

Section 26.9.16: SDIO register map on page 791

Section 10.13.18: ADC register map on page 253

Section 24.6.8: USART register map on page 682

Section 13.4.21: TIM1 and TIM8 register map on

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