Table 81. Smbus Vs. I2C - ST STM32F205 series Reference Manual

Inter-integrated circuit (I2C) interface
Similarities between SMBus and I
•
2 wire bus protocol (1 Clk, 1 Data) + SMBus Alert line optional
•
Master-slave communication, Master provides clock
•
Multi master capability
•
SMBus data format similar to I
Differences between SMBus and I
The following table describes the differences between SMBus and I
Max. speed 100 kHz
Min. clock speed 10 kHz
35 ms clock low timeout
Logic levels are fixed
Different address types (reserved, dynamic etc.)
Different bus protocols (quick command, process
call etc.)
SMBus application usage
With System Management Bus, a device can provide manufacturer information, tell the
system what its model/part number is, save its state for a suspend event, report different
types of errors, accept control parameters, and return its status. SMBus provides a control
bus for system and power management related tasks.
Device identification
Any device that exists on the System Management Bus as a slave has a unique address
called the Slave Address. For the list of reserved slave addresses, refer to the SMBus
specification version. 2.0 (http://smbus.org/).
Bus protocols
The SMBus specification supports up to nine bus protocols. For more details of these
protocols and SMBus address types, refer to SMBus specification version. 2.0. These
protocols should be implemented by the user software.
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C
2
C 7-bit addressing format
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Table 81. SMBus vs. I
SMBus
RM0033 Rev 8
(Figure
C
2
C
Max. speed 400 kHz
No minimum clock speed
No timeout
Logic levels are V
7-bit, 10-bit and general call slave address types
No bus protocols
RM0033
216).
2
C.
2
I C
dependent
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