Clock-Out Capability; Internal/External Clock Measurement Using Tim5/Tim11 - ST STM32F205 series Reference Manual

RM0033
5.2.10

Clock-out capability

Two microcontroller clock output (MCO) pins are available:
•
MCO1
You can output four different clock sources onto the MCO1 pin (PA8) using the
configurable prescaler (from 1 to 5):
–
–
–
–
The desired clock source is selected using the MCO1PRE[2:0] and MCO1[1:0] bits in
the
• MCO2
You can output four different clock sources onto the MCO2 pin (PC9) using the
configurable prescaler (from 1 to 5):
–
–
–
–
The desired clock source is selected using the MCO2PRE[2:0] and MCO2 bits in the
RCC clock configuration register
For the different MCO pins, the corresponding GPIO port has to be programmed in alternate
function mode.
The selected clock to output onto MCO must not exceed 100 MHz (the maximum I/O
speed).
5.2.11

Internal/external clock measurement using TIM5/TIM11

It is possible to indirectly measure the frequencies of all on-board clock source generators
by means of the input capture of TIM5 channel4 and TIM11 channel1 as shown in
and Figure
Internal/external clock measurement using TIM5 channel4
TIM5 has an input multiplexer which allows choosing whether the input capture is triggered
by the I/O or by an internal clock. This selection is performed through the TI4_RMP [1:0] bits
in the TIM5_OR register.
The primary purpose of having the LSE connected to the channel4 input capture is to be
able to precisely measure the HSI (this requires to have the HSI used as the system clock
source). The number of HSI clock counts between consecutive edges of the LSE signal
provides a measurement of the internal clock period. Taking advantage of the high precision
of LSE crystals (typically a few tens of ppm) we can determine the internal clock frequency
with the same resolution, and trim the source to compensate for manufacturing-process
and/or temperature- and voltage-related frequency deviations.
The HSI oscillator has dedicated, user-accessible calibration bits for this purpose.
HSI clock
LSE clock
HSE clock
PLL clock
RCC clock configuration register
HSE clock
PLL clock
System clock (SYSCLK)
PLLI2S clock
11.
(RCC_CFGR).
(RCC_CFGR).
RM0033 Rev 8
Reset and clock control (RCC)
Figure 11
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