Digital Camera Interface (Dcmi); Dcmi Introduction; Dcmi Main Features; Dcmi Pins - ST STM32F205 series Reference Manual

Digital camera interface (DCMI)

12 Digital camera interface (DCMI)
This section applies to the whole STM32F20x and STM32F21x family, unless otherwise
specified.
12.1

DCMI introduction

The digital camera is a synchronous parallel interface able to receive a high-speed data flow
from an external 8-, 10-, 12- or 14-bit CMOS camera module. It supports different data
formats: YCbCr4:2:2/RGB565 progressive video and compressed data (JPEG).
This interface is for use with black & white cameras, X24 and X5 cameras, and it is
assumed that all pre-processing like resizing is performed in the camera module.
12.2

DCMI main features

•
8-, 10-, 12- or 14-bit parallel interface
•
Embedded/external line and frame synchronization
•
Continuous or snapshot mode
•
Crop feature
•
Supports the following data formats:
–
–
–
–
12.3

DCMI pins

Table 44
D[0:13]
HSYNC
VSYNC
PIXCLK
12.4

DCMI clocks

The digital camera interface uses two clock domains PIXCLK and HCLK. The signals
generated with PIXCLK are sampled on the rising edge of HCLK once they are stable. An
enable signal is generated in the HCLK domain, to indicate that data coming from the
278/1378
8/10/12/14- bit progressive video: either monochrome or raw bayer
YCbCr 4:2:2 progressive video
RGB 565 progressive video
Compressed data: JPEG
shows the DCMI pins.
Name
Data inputs
Horizontal synchronization input
Vertical synchronization input
Pixel clock input

Table 44. DCMI pins

Signal type
RM0033 Rev 8
RM0033