Output Signal Allocations - YASKAWA SGD7C-***AMAA*** Product Manual

5.19.2

Output Signal Allocations

You can allocate the desired output signals to pins 23 to 32 on the I/O signal connector (CN1).
The parameters that you use to allocate signals depend on whether you use Σ-7S-compatible
I/O signal allocations (Pn50A = n.1) or multi-axis I/O signal allocations (Pn50A =
n.2).
Σ-7S-Compatible Output Signal Allocations
• The signals that are not detected are considered to be OFF. For example, the /COIN (Position-
ing Completion) signal is considered to be OFF during speed control.
• Reversing the polarity of the /BK (Brake Output) signal, i.e., changing it to positive logic, will
Important
prevent the holding brake from operating if its signal line is disconnected. If you must change
the polarity of this signal, verify operation and make sure that no safety problems will exist.
• If you allocate more than one signal to the same output circuit, a logical OR of the signals will
be output.
Output signals are allocated as shown in the following table.
Refer to Interpreting the Output Signal Allocation Tables and change the allocations accord-
ingly.
Interpreting the Output Signal Allocation Tables
Output ignal Name
and Parameter
Brake Output
Pn50F = n. X
The e column give the parameter etting to u e.
ignal are allocated to CN1 pin according to the etting .
Output ignal
Axi A: 2 and 24 Axi B: 25 and 26
1
/BK
5.19 I/O Signal Allocations

5.19.2 Output Signal Allocations

CN1 Pin No.
Axi A: 27 and 28 Axi B: 29 and 0
2
Di abled
(Not U ed)
0
5
5-53