Count Source Protective Mode - Renesas M16C/62P Series Hardware Manual

M16C/62P Group (M16C/62P, M16C/62PT)
Watchdog Timer Control Register
b7 b6 b5 b4 b3 b2 b1 b0
0
NOTES :
1. Writing to the WDC register factors the WDC5 bit to be set to "1" (w arm start). If the voltage applied to VCC1 is less
than 4.0 V, either w rite to this register w hen the CPU clock frequency is 2 MHz or w rite tw ice.
2. The WDC5 bit is set to "0" (cold start) w hen pow er is turned on and can be set to "1" by program only.
Watchdog Timer Start Register
b7 b0
NOTES :
1. Write to the WDTS register after the w atchdog timer interrupt occurs.
Figure 13.2 WDC and WDTS Register
13.1

Count source protective mode

In this mode, a on-chip oscillator clock is used for the watchdog timer count source. The watchdog timer can be
kept being clocked even when CPU clock stops as a result of run-away.
Before this mode can be used, the following register settings are required:
(1) Set the PRC1 bit in the PRCR register to "1" (enable writes to PM1 and PM2 registers).
(2) Set the PM12 bit in the PM1 register to "1" (reset when the watchdog timer underflows).
(3) Set the PM22 bit in the PM2 register to "1" (on-chip oscillator clock used for the watchdog timer count
source).
(4) Set the PRC1 bit in the PRCR register to "0" (disable writes to PM1 and PM2 registers).
(5) Write to the WDTS register (watchdog timer starts counting).
Setting the PM22 bit in the PM register to "1" results in the following conditions.
•
The on-chip oscillator starts oscillating, and the on-chip oscillator clock becomes the watchdog timer count
source.
Watchdog timer period
•
The CM10 bit in the CM1 register is disabled against write (Writing a "1" has no effect, nor is stop mode
entered).
•
The watchdog timer does not stop when in wait mode or hold state.
Rev.2.41 Jan 10, 2006
REJ09B0185-0241
http://www.xinpian.net
Symbol
WDC
Bit Symbol
— High-order Bit of Watchdog Timer
(b4-b0)
Cold Start / Warm Start Discrimination
WDC5
(1, 2)
Flag
— Reserved Bit
(b6)
Prescaler Select Bit
WDC7
(1)
Symbol Address
000Eh
WDTS
The w atchdog timer is initialized and starts counting after a w rite instruction to this register.
The w atchdog timer value is alw ays initialized to "7FFFh" regardless of w hatever value is
w ritten.
Watchdog timer count (32768)
=
On-chip oscillator clock
Page 125 of 390
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Address
000Fh
Bit Name
0 : Cold Start
1 : Warm Start
Set to "0"
0 : Divided by 16
1 : Divided by 128
Function
13. Watchdog Timer
After Reset
(2)
00XXXXXXb
Function
After Reset
Indeterminate
010-62245566 13810019655
RW
RO
RW
RW
RW
RW
WO