Count Source Protective Mode - Renesas M16C FAMILY series Hardware Manual

M 1 6 C 2 / 8 G o r u p ( M 1 6 C
Watchdog Timer Control Register
b7 b6 b5 b4
0 0
Watchdog Timer Start Register
b7
Figure 10.2 WDC Register and WDTS Register

10.1 Count Source Protective Mode

In this mode, a on-chip oscillator clock is used for the watchdog timer count source. The watchdog timer
can be kept being clocked even when CPU clock stops as a result of run-away.
Before this mode can be used, the following register settings are required:
(1) Set the PRC1 bit in the PRCR register to "1" (enable writes to PM1 and PM2 registers).
(2) Set the PM12 bit in the PM1 register to "1" (reset when the watchdog timer underflows).
(3) Set the PM22 bit in the PM2 register to "1" (on-chip oscillator clock used for the watchdog timer count source).
(4) Set the PRC1 bit in the PRCR register to "0" (disable writes to PM1 and PM2 registers).
(5) Write to the WDTS register (watchdog timer starts counting).
Setting the PM22 bit to "1" results in the following conditions
• The on-chip oscillator continues oscillating even if the CM21 bit in the CM2 register is set to "0" (main clock
or PLL clock) (system clock of count source selected by the CM21 bit is valid)
• The on-chip oscillator starts oscillating, and the on-chip oscillator clock becomes the watchdog timer
count source.
Watchdog timer period =
• The CM10 bit in the CM1 register is disabled against write. (Writing a "1" has no effect, nor is stop mode entered.)
• The watchdog timer does not stop when in wait mode.
R e . v 2 0 . 0 J a . n 3 , 1 2 0 0 7
R E J 0 9 B 0 0 4 7 0 - 2 0 0
2 / , 8 M 1 6 C 2 / 8 ) B
b3 b2 b1 b0
Symbol
WDC
Bit Symbol
(b4-b0)
(b5)
(b6)
WDC7
(1)
b0
Symbol
WDTS
The watchdog timer is initialized and starts counting after a write instruction to
this register. The watchdog timer value is always initialized to "7FFF
regardless of whatever value is written.
Watchdog timer count (32768)
On-chip oscillator clock
page 87
f o 3 8 5
Address
000F
16
Bit Name
High-order bit of watchdog timer
Reserved bit Set to "0"
Reserved bit Set to "0"
0: Divided by 16
Prescaler select bit
1: Divided by 128
Address After Reset
000E Indeterminate
16
Function
10. Watchdog Timer
After Reset
00XXXXXX
2
Function RW
RO
RW
RW
RW
"
16
RW
WO