Recovery - Avaya S8700 Maintenance Manual

Maintenance Object Repair Procedure
MMI Synchronization Status Test
(#1122 and 1123)
This test is nondestructive.
To support applications involving multiple MMI circuit packs, the appropriate MMI
circuit packs must be synchronized with one another. One such circuit pack is
designated as the master sync source, which provides the synchronization signal
onto the TDM bus. The other MMI circuit packs in the system listen to this signal.
This test monitors this synchronization state. The test fails if the MMI circuit pack
is not in sync. The test passes with auxiliary code 1100 if the MMI circuit pack is
in sync and is providing the synchronization signal for the system. The test also
passes with an auxiliary code of 1101 if the MMI circuit pack is in sync and
listening to the sync signal. MMI circuit packs do not lose the synchronization
signal unless an MMI circuit pack is either pulled out of the system or reset by
using a technician command.
Test #1122 runs when the long option of the test board command is entered,
initiating the recovery of synchronization. Test #1123 runs when the short option
of the test board command is entered, giving the status of the synchronization.
You need not necessarily run the long option since synchronization signal
recovery should be taking place within software running in the background. Use
the long option only if synchronization is not established within 5 minutes of
investigating the problem.
Table 8-341. Test #1122/1123 MMI Synchronization Status Test
Error Test
Code Result Description / Recommendation
ABORT Internal system error. This is an abnormal abort.
1. Retry the command at 1-minute intervals up to 5 times.
2000 ABORT A response to the test was not received from the MMI circuit pack within the
allowable time period.
1. If this result occurs repeatedly and the MMI circuit pack is idle, reset the
2. Rerun the test; if the same result occurs again, replace the MMI circuit
2012 ABORT Internal system error
2100 ABORT Could not allocate the necessary resources to run this test. This is an
abnormal abort.
1. Retry the command at 1-minute intervals up to 5 times.
8-792 Issue 1 May 2002
circuit pack using busyout board UUCSS, then reset board UUCSS,
followed by release board UUCSS.
pack.
Continued on next page
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