Wake-Up Sources; Fpu Configuration - NXP Semiconductors freescale KV4 Series Reference Manual

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FPU Configuration

3.3.1 Wake-up sources

The device uses the following internal and external inputs to the AWIC module.
Table 3-6. AWIC Stop and VLPS Wake-up Sources
Wake-up source
Available system resets
Low-voltage detect
Low-voltage warning
Pin interrupts
ADCx
CMPx
2
I
C
UART
LPTMR
FlexCAN
NMI
3.4 FPU Configuration
This section summarizes how the module has been configured in the chip.
Table 3-7. Reference links to related information
Topic
Full description
System memory map
Clocking
Power Management
Transfers
ARM Cortex M4 core
Private Peripheral Bus
(PPB)
80
RESET pin and WDOG when LPO is its clock source, and JTAG
Mode Controller
Mode Controller
Port Control Module - Any enabled pin interrupt is capable of waking the system
The ADC is functional
Since no system clocks are available, functionality is limited
Address match wakeup
Active edge on RXD
Functional in Stop/VLPS modes
Functional in Stop mode
Non-maskable interrupt
PPB
FPU
Transfers
Figure 3-4. FPU configuration
Related module
FPU
KV4x Reference Manual, Rev. 2, 02/2015
Preliminary
Description
Reference
ARM Cortex-M4 Technical Reference Manual
System memory map
Clock Distribution
Power Management
ARM Cortex-M4 core
Freescale Semiconductor, Inc.

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