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Figure 6-4. PORTx digital input filter clock generation
6.5.6 LPTMR clocking
The prescaler and glitch filters in each of the LPTMRx modules can be clocked as shown
in the following figure.
The chosen clock must remain enabled if the LPTMRx is to
continue operating in all required low-power modes.
MCGIRCLK
ERCLK32K
OSCERCLK
Figure 6-5. LPTMRx prescaler/glitch filter clock generation
6.5.7 FlexCAN clocking
The clock for the FlexCAN's protocol engine can be selected as shown in the following
figure.
Freescale Semiconductor, Inc.
Bus clock
LPO
PORTx_DFCR[CS]
LPO
LPTMRx_PSR[PCS]
KV4x Reference Manual, Rev. 2, 02/2015
Preliminary
PORTx digital input
filter clock
NOTE
LPTMRx prescaler/glitch
filter clock
Chapter 6 Clock Distribution
103
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