Wdog Clocking - NXP Semiconductors freescale KV4 Series Reference Manual

Table of Contents

UART0, UART1

6.5.1 nano edge module clocking

The nano edge module clocking options are shown in the following figure.

6.5.2 WDOG clocking

The WDOG may be clocked from two clock sources as shown in the following figure.

Freescale Semiconductor, Inc.

Table 6-1. Module clocks (continued)

Bus interface clock

Fast Peripheral clock

Bus / Flash clock

Fast Peripheral clock

Fast Peripheral clock

Bus / Flash clock

Fast Peripheral clock

Communication interfaces

Fast Peripheral clock

Bus / Flash clock

Fast Peripheral clock

Human-machine interfaces

Core/System clock

Fast Peripheral clock

SIM_SOPT2[NANOEDGECLK2XSEL]

Figure 6-2. Nano-Edge module Clock inputs

KV4x Reference Manual, Rev. 2, 02/2015

Internal clocks

LPO, OSCERCLK_UNDIV,

MCGIRCLK, ERCLK32K

nano-edge clk

2x nano-edge clk

Chapter 6 Clock Distribution

I/O interface clocks