Debug Module State In Low Power Modes; Debug & Security - NXP Semiconductors freescale KV4 Series Reference Manual

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With debug enabled, transitions from Run directly to VLPS are not allowed and result in
the system entering Stop mode instead. Status bits within the MDM-AP Status register
can be evaluated to determine this pseudo-VLPS state. Note with the debug enabled,
transitions from Run--> VLPR --> VLPS are still possible but also result in the system
entering Stop mode instead.
In VLLS mode all debug modules are powered off and reset at wakeup.
Going into a VLLSx mode causes all the debug controls and settings to be reset. To give
time to the debugger to sync up with the HW, the MDM-AP Control register can be
configured hold the system in reset on recovery so that the debugger can regain control
and reconfigure debug logic prior to the system exiting reset and resuming operation.

9.10.1 Debug Module State in Low Power Modes

The following table shows the state of the debug modules in low power modes. These
terms are used:
• FF = Full functionality. In VLPR and VLPW the system frequency is limited, but if a
module does not have a limitation in its functionality, it is still listed as FF.
• static = Module register states and associated memories are retained.
• OFF = Modules are powered off; module is in reset state upon wakeup.
Table 9-6. Debug Module State in Low Power Modes
Module
STOP
Debug Port
FF
AHB-AP
FF
ITM
FF
TPIU
FF
DWT
FF
9.11 Debug & Security
When security is enabled (FSEC[SEC] != 10), the debug port capabilities are limited in
order to prevent exploitation of secure data. In the secure state the debugger still has
access to the MDM-AP Status Register and can determine the current security state of the
device. In the case of a secure device, the debugger also has the capability of performing
a mass erase operation via writes to the MDM-AP Control Register. In the case of a
secure device that has mass erase disabled (FSEC[MEEN] = 10), attempts to mass erase
via the debug interface are blocked.
Freescale Semiconductor, Inc.
VLPR
VLPW
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
KV4x Reference Manual, Rev. 2, 02/2015
Preliminary
VLPS
LLS
OFF
static
OFF
static
OFF
static
OFF
static
OFF
static
Chapter 9 Debug
VLLSx
OFF
OFF
OFF
OFF
OFF
127

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