7.2
Data Transmission Process
The data is transmitted between the LD75 memories with steps (1) to (8) shown below.
The data transmission patterns numbered (1) to (8) of the descriptions correspond to the numbers (1) to (8) of the
illustration.
(1) Power supply ON/
CPU module reset
Flash ROM
Parameter area (a)
Parameter area (b)
Positioning data area
(No.1 to 600)
Block start data area
(No.7000 to 7004)
308
CPU module
(4) FROM instruction
Buffer memory
Parameter area (a)
Parameter area (b)
Positioning data area
(No.1 to 600)
Block start data area
(No.7000 to 7004)
Monitor data area
Control data area
PLC CPU
memo area
(2) TO instruction
LD75
Parameter area (a)
Parameter area (b)
(3) PLC READY signal
[Y0] OFF
Pr.1 to
Pr.7
Pr.24
Pr.11
to
Pr.43
to
Pr.57
Pr.70
,
Pr.150
Pr.8
Pr.10
to
Pr.25 to
Pr.42
ON