Analog Devices ADSP-SC58 Series Hardware Reference Manual page 2657

Sharc+ processor
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ADSP-SC58x DAI Register Descriptions
Pin Buffer Assignment Register 2
The
register routes physical pins that are connected to a bonded pad.
DAI_PIN2
PB11[1:0] (R/W)
Pin Buffer 11 Input
PB10 (R/W)
Pin Buffer 10 Input
PB12 (R/W)
Pin Buffer 12 Input
Figure 33-49: DAI_PIN2 Register Diagram
Table 33-60: DAI_PIN2 Register Fields
Bit No.
(Access)
27:21
PB12
(R/W)
20:14
PB11
(R/W)
13:7
PB10
(R/W)
6:0
PB09
(R/W)
33–106
15
14
13
12
11
1
0
0
0
1
31
30
29
28
27
0
0
0
0
0
Bit Name
Pin Buffer 12 Input.
DAI_PIN2.PB12 holds the Source signal assignment that will be routed to the
DAI_PIN2.PB12 Destination. Refer to the Group D Signals table for Source and
Destination mappings.
Pin Buffer 11 Input.
DAI_PIN2.PB11 holds the Source signal assignment that will be routed to the
DAI_PIN2.PB11 Destination. Refer to the Group D Signals table for Source and
Destination mappings.
Pin Buffer 10 Input.
DAI_PIN2.PB10 holds the Source signal assignment that will be routed to the
DAI_PIN2.PB10 Destination. Refer to the Group D Signals table for Source and
Destination mappings.
Pin Buffer 9 Input.
DAI_PIN2.PB09 holds the Source signal assignment that will be routed to the
DAI_PIN2.PB09 Destination. Refer to the Group D Signals table for Source and
Destination mappings.
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
10
9
8
7
6
5
4
3
1
0
0
1
0
0
1
1
26
25
24
23
22
21
20
19
0
1
1
0
1
1
0
0
Description/Enumeration
2
1
0
0
0
0
PB09 (R/W)
Pin Buffer 9 Input
18
17
16
1
1
0
PB11[6:2] (R/W)
Pin Buffer 11 Input

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