Analog Devices ADSP-SC58 Series Hardware Reference Manual page 2652

Sharc+ processor
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Pin Buffer Enable Register 1
The
register routes signals to the pin enables, and the value of these signals determines if a DAI pin is
DAI_PBEN1
used as an output or an input.
PB08[3:0] (R/W)
Pin Buffer Enable 8
PB07 (R/W)
Pin Buffer Enable 7
PB10 (R/W)
Pin Buffer Enable 10
PB09 (R/W)
Pin Buffer Enable 9
Figure 33-44: DAI_PBEN1 Register Diagram
Table 33-55: DAI_PBEN1 Register Fields
Bit No.
(Access)
29:24
PB10
(R/W)
23:18
PB09
(R/W)
17:12
PB08
(R/W)
11:6
PB07
(R/W)
5:0
PB06
(R/W)
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
15
14
13
12
11
10
1
1
0
1
0
31
30
29
28
27
26
0
0
0
1
0
Bit Name
Pin Buffer Enable 10.
The DAI_PBEN1.PB10 bit field is the pin buffer enable for DAI port 10.
Pin Buffer Enable 9.
The DAI_PBEN1.PB09 bit field is the pin buffer enable for DAI port 9.
Pin Buffer Enable 8.
The DAI_PBEN1.PB08 bit field is the pin buffer enable for DAI port 8.
Pin Buffer Enable 7.
The DAI_PBEN1.PB07 bit field is the pin buffer enable for DAI port 7.
Pin Buffer Enable 6.
The DAI_PBEN1.PB06 bit field is the pin buffer enable for DAI port 6.
9
8
7
6
5
4
3
0
1
1
0
0
0
0
1
25
24
23
22
21
20
19
18
0
1
1
0
1
0
0
1
Description/Enumeration
ADSP-SC58x DAI Register Descriptions
2
1
0
1
1
1
PB06 (R/W)
Pin Buffer Enable 6
17
16
0
0
0
PB08[5:4] (R/W)
Pin Buffer Enable 8
33–101

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Adsp-2158 series

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