Figure 230. Mute Mode Using Idle Line Detection; Figure 231. Mute Mode Using Address Mark Detection - ST STM32F207 Series Reference Manual

Advanced arm-based 32-bit mcus
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RM0033
Address mark detection (WAKE=1)
In this mode, bytes are recognized as addresses if their MSB is a '1 else they are
considered as data. In an address byte, the address of the targeted receiver is put on the 4
LSB. This 4-bit word is compared by the receiver with its own address which is programmed
in the ADD bits in the USART_CR2 register.
The USART enters mute mode when an address character is received which does not
match its programmed address. In this case, the RWU bit is set by hardware. The RXNE
flag is not set for this address byte and no interrupt nor DMA request is issued as the
USART would have entered mute mode.
It exits from mute mode when an address character is received which matches the
programmed address. Then the RWU bit is cleared and subsequent bytes are received
normally. The RXNE bit is set for the address character since the RWU bit has been
cleared.
The RWU bit can be written to as 0 or 1 when the receiver buffer contains no data (RXNE=0
in the USART_SR register). Otherwise the write attempt is ignored.
An example of mute mode behavior using address mark detection is given in
In this example, the current address of the receiver is 1
(programmed in the USART_CR2 register)
RX
RWU
Universal synchronous asynchronous receiver transmitter (USART)

Figure 230. Mute mode using Idle line detection

Data 1 Data 2
RX
RWU
RWU written to 1

Figure 231. Mute mode using address mark detection

IDLE
Addr=0 Data 1 Data 2
RWU written to 1
(RXNE was cleared)
Non-matching address
Data 3 Data 4
IDLE
Mute mode
Idle frame detected
IDLE
Addr=1 Data 3 Data 4 Addr=2 Data 5
Mute mode
Matching address
RM0033 Rev 9
RXNE
RXNE
Data 5
Data 6
Normal mode
RXNE
RXNE
RXNE
Normal mode
Non-matching address
MSv40881V1
Figure
231.
Mute mode
MSv40882V1
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