Figure 135. Control Circuit In External Clock Mode 1; Figure 136. External Trigger Input Block - ST STM32F207 Series Reference Manual

Advanced arm-based 32-bit mcus

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Counter clock = CK_CNT = CK_PSC

External clock source mode 2

This mode is selected by writing ECE=1 in the TIMx_SMCR register.

The counter can count at each rising or falling edge on the external trigger input ETR.

For example, to configure the upcounter to count each 2 rising edges on ETR, use the

following procedure:

As no filter is needed in this example, write ETF[3:0]=0000 in the TIMx_SMCR register.

Set the prescaler by writing ETPS[1:0]=01 in the TIMx_SMCR register

Select rising edge detection on the ETR pin by writing ETP=0 in the TIMx_SMCR

Enable external clock mode 2 by writing ECE=1 in the TIMx_SMCR register.

Enable the counter by writing CEN=1 in the TIMx_CR1 register.

The counter counts once each 2 ETR rising edges.

Figure 135. Control circuit in external clock mode 1

Counter register

gives an overview of the external trigger input block.

/1, /2, /4, /8

RM0033 Rev 9

General-purpose timers (TIM2 to TIM5)

(internal clock)

External clock

External clock

Internal clock

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