Figure 250. Data Clock Timing Diagram - ST STM32F207 Series Reference Manual

Advanced arm-based 32-bit mcus
Hide thumbs Also See for STM32F207 Series:
Table of Contents

Advertisement

Serial peripheral interface (SPI)
1. These timings are shown with the LSBFIRST bit reset in the SPI_CR1 register.
Data frame format
Data can be shifted out either MSB-first or LSB-first depending on the value of the
LSBFIRST bit in the SPI_CR1 register.
Each data frame is 8 or 16 bits long depending on the size of the data programmed using
the DFF bit in the SPI_CR1 register. The selected data frame format is applicable for
transmission and/or reception.
688/1381

Figure 250. Data clock timing diagram

CPOL = 1
CPOL = 0
MOSI
MSBit
MISO
MSBit
NSS
(to slave)
Capture strobe
CPOL = 1
CPOL = 0
MOSI
MSBit
MISO
MSBit
NSS
(to slave)
Capture strobe
CPHA =1
CPHA =0
RM0033 Rev 9
RM0033
LSBit
LSBit
LSBit
LSBit
ai17154d

Advertisement

Table of Contents
loading
Need help?

Need help?

Do you have a question about the STM32F207 Series and is the answer not in the manual?

Subscribe to Our Youtube Channel

Table of Contents