Duration Of The Processing; Data Type - ST STM32F207 Series Reference Manual

Hash processor (HASH)
bits can be grouped as bytes (8 bits) or words (32 bits) (but some implementations also use
half-words (16 bits), and implicitly, uses the big-endian byte (half-word) ordering. This
convention is mainly important for padding (see
page 12).
21.3.1

Duration of the processing

The computation of an intermediate block of a message takes:
•
66 HCLK clock cycles in SHA-1
•
50 HCLK clock cycles in MD5
to which you must add the time needed to load the 16 words of the block into the processor
(at least 16 clock cycles for a 512-bit block).
The time needed to process the last block of a message (or of a key in HMAC) can be
longer. This time depends on the length of the last block and the size of the key (in HMAC
mode). Compared to the processing of an intermediate block, it can be increased by a factor
of:
•
1 to 2.5 for a hash message
•
around 2.5 for an HMAC input-key
•
1 to 2.5 for an HMAC message
•
around 2.5 for an HMAC output key in case of a short key
•
3.5 to 5 for an HMAC output key in case of a long key
21.3.2

Data type

Data are entered into the hash processor 32 bits (word) at a time, by writing them into the
HASH_DIN register. But the original bit-string can be organized in bytes, half-words or
words, or even be represented as bits. As the system memory organization is little-endian
and SHA1 computation is big-endian, depending on the way the original bit string is
grouped, a bit, byte, or half-word swapping operation is performed automatically by the hash
processor.
The kind of data to be processed is configured with the DATATYPE bitfield in the HASH
control register (HASH_CR).
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Section 1.3.4: Message padding on
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