I/O Pin Multiplexer And Mapping - ST STM32F207 Series Reference Manual

RM0033
6.3.2

I/O pin multiplexer and mapping

The microcontroller I/O pins are connected to onboard peripherals/modules through a
multiplexer that allows only one peripheral's alternate function (AF) connected to an I/O pin
at a time. In this way, there can be no conflict between peripherals sharing the same I/O pin.
Each I/O pin has a multiplexer with sixteen alternate function inputs (AF0 to AF15) that can
be configured through the GPIOx_AFRL (for pin 0 to 7) and GPIOx_AFRH (for pin 8 to 15)
registers:
•
After reset all I/Os are connected to the system's alternate function 0 (AF0)
•
The peripherals' alternate functions are mapped from AF1 to AF13
•
Cortex
This structure is shown in
In addition to this flexible I/O multiplexing architecture, each peripheral has alternate
functions mapped onto different I/O pins to optimize the number of peripherals available in
smaller packages.
To use an I/O in a given configuration, proceed as follows:
• System function
Connect the I/O to AF0 and configure it depending on the function used:
–
–
–
Note: The user can disable some or all of the JTAG/SWD pins and so release the associated pins
for GPIO usage (released pins highlighted in gray in the table).
For more details refer to
®
-M3 EVENTOUT is mapped on AF15
Figure 14
JTAG/SWD, after each device reset these pins are assigned as dedicated pins
immediately usable by the debugger host (not controlled by the GPIO controller)
RTC_50Hz: this pin should be configured in Input floating mode
MCO1 and MCO2: these pins have to be configured in alternate function mode.
Section 5.2.10: Clock-out
below.
capability.
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General-purpose I/Os (GPIO)
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