Table 11. Standby Mode; Table 16. Rtc_Af1 Pin - ST STM32F207 Series Reference Manual

Advanced arm-based 32-bit mcus
Hide thumbs Also See for STM32F207 Series:
Table of Contents

Advertisement

RM0033
Standby mode
Mode entry
Mode exit
Wakeup latency
I/O states in Standby mode
In Standby mode, all I/O pins are high impedance except for:
Reset pad (still available)
RTC_AF1 pin (PC13) if configured for tamper, time stamp, RTC Alarm out, or RTC
clock calibration out
RTC_AF2 pin (PI8) if configured for tamper or time stamp
WKUP pin (PA0), if enabled
Debug mode
By default, the debug connection is lost if the application puts the MCU in Stop or Standby
mode while the debug features are used. This is due to the fact that the Cortex
no longer clocked.
However, by setting some configuration bits in the DBGMCU_CR register, the software can
be debugged even when using the low-power modes extensively. For more details, refer to
Section 32.16.1: Debug support for low-power

Table 11. Standby mode

WFI (Wait for Interrupt) or WFE (Wait for Event) while:
– SLEEPDEEP is set in Cortex
– PDDS bit is set in Power Control register (PWR_CR)
– WUF bit is cleared in Power Control/Status register (PWR_CR)
– the RTC flag corresponding to the chosen wakeup source (RTC Alarm A,
RTC Alarm B, RTC wakeup, Tamper or Timestamp flags) is cleared
On return from ISR while:
– SLEEPDEEP bit is set in Cortex
– SLEEPONEXIT = 1 and
– PDDS bit is set in Power Control register (PWR_CR) and
– WUF bit is cleared in Power Control/Status register (PWR_SR)
WKUP pin rising edge, RTC alarm (Alarm A and Alarm B), RTC wakeup,
tamper event, time stamp event, external reset in NRST pin, IWDG reset.
Reset phase.
RM0033 Rev 9
Description
®
-M3 System Control register
®
-M3 System Control register and
modes.
Power control (PWR)
®
-M3 core is
77/1381
83

Advertisement

Table of Contents
loading
Need help?

Need help?

Do you have a question about the STM32F207 Series and is the answer not in the manual?

Questions and answers

Table of Contents