ST STM32F207 Series Reference Manual page 158

Advanced arm-based 32-bit mcus
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General-purpose I/Os (GPIO)
Offset
Register
GPIOx_PUPDR
I
(where x = C..
)
0x0C
Reset value
GPIOx_IDR
(where x = A..I)
0x10
Reset value
GPIOx_ODR
(where x = A..I)
0x14
Reset value
GPIOx_BSRR
(where x = A..I)
0x18
Reset value
GPIOx_LCKR
(where x = A..I)
0x1C
Reset value
GPIOx_AFRL
(where x = A..I)
0x20
Reset value
GPIOx_AFRH
AFRH15[3:0] AFRH14[3:0] AFRH13[3:0] AFRH12[3:0] AFRH11[3:0] AFRH10[3:0]
(where x = A..I)
0x24
Reset value
Refer to
158/1381
Table 18. GPIO register map and reset values (continued)
0
0
0
0
0
0
0
0
0
Reserved
Reserved
0
0
0
0
0
0
0
0
0
Reserved
AFRL7[3:0]
AFRL6[3:0]
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Section 2.3: Memory map
0
0
0
0
0
0
0
0
x
0
0
0
0
0
0
0
0
0
0
0
AFRL5[3:0]
AFRL4[3:0]
AFRL3[3:0]
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
for the register boundary addresses.
RM0033 Rev 9
0
0
0
0
0
0
0
0
0
x
x
x
x
x
x
x
x
x
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
AFRL2[3:0]
AFRL1[3:0]
0
0
0
0
0
0
0
0
0
AFRH9[3:0]
0
0
0
0
0
0
0
0
0
RM0033
0
0
0
0
0
0
x
x
x
x
x
x
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
AFRL0[3:0]
0
0
0
0
0
0
AFRH8[3:0]
0
0
0
0
0
0

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