RM0033
•
Separate enable bits for transmitter and receiver
•
Transfer detection flags:
–
–
–
•
Parity control:
–
–
•
Four error detection flags:
–
–
–
–
•
Ten interrupt sources with flags:
–
–
–
–
–
–
–
–
–
–
•
Multiprocessor communication - enter into mute mode if address match does not occur
•
Wake up from mute mode (by idle line detection or address mark detection)
•
Two receiver wakeup modes: Address bit (MSB, 9
24.3
USART functional description
The interface is externally connected to another device by three pins (see
USART bidirectional communication requires a minimum of two pins: Receive Data In (RX)
and Transmit Data Out (TX):
RX: Receive Data Input is the serial data input. Oversampling techniques are used for data
recovery by discriminating between valid incoming data and noise.
TX: Transmit Data Output. When the transmitter is disabled, the output pin returns to its I/O
port configuration. When the transmitter is enabled and nothing is to be transmitted, the TX
pin is at high level. In single-wire and smartcard modes, this I/O is used to transmit and
receive the data (at USART level, data are then received on SW_RX).
Universal synchronous asynchronous receiver transmitter (USART)
Receive buffer full
Transmit buffer empty
End of transmission flags
Transmits parity bit
Checks parity of received data byte
Overrun error
Noise detection
Frame error
Parity error
CTS changes
LIN break detection
Transmit data register empty
Transmission complete
Receive data register full
Idle line received
Overrun error
Framing error
Noise error
Parity error
RM0033 Rev 9
th
bit), Idle line
Figure
223). Any
631/1381
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