ST STM32F207 Series Reference Manual page 597

RM0033
Offset Register
RTC_ALRMAR
0x1C
Reset value 0
RTC_ALRMBR
0x20
Reset value 0
RTC_WPR
0x24
Reset value
RTC_TSTR
0x30
Reset value
RTC_TSDR
0x34
Reset value
RTC_TAFCR
0x40
Reset value
RTC_BKP0R
Reset value 0
0x50
to 0x9C
to
RTC_BKP19R
Reset value 0
Refer to
Caution: In Table
registers are not affected by a system reset. For more information, please refer to
Section 22.3.7: Resetting the
Table 80. RTC register map and reset values (continued)
DT
DU[3:0]
[1:0]
0 0 0 0 0 0 0 0
DT
DU[3:0]
[1:0]
0 0 0 0 0 0 0 0
Reserved
Reserved
Reserved
0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0
Section 2.3: Memory map
80, the reset value is the value after a backup domain reset. The majority of the
RTC.
HT
HU[3:0] MNT[2:0]
[1:0]
0 0 0 0 0 0 0 0 0
HT
HU[3:0] MNT[2:0]
[1:0]
0 0 0 0 0 0 0 0 0
Reserved
HU[3:0]
0 0 0 0 0 0 0 0
WDU[2:0]
0 0 0 0 0 0 0 0
0 0 0
BKP[31:0]
0 0 0 0 0 0 0 0 0
BKP[31:0]
0 0 0 0 0 0 0 0 0
for the register boundary addresses.
RM0033 Rev 9
Real-time clock (RTC)
MNU[3:0] ST[2:0]
0 0 0 0 0 0 0 0 0 0
MNU[3:0] ST[2:0]
0 0 0 0 0 0 0 0 0 0
0 0 0 0
MNU[3:0] ST[2:0]
0 0 0 0 0 0 0 0 0
DT
MU[3:0]
[1:0]
0 0 0 0 0 0
Reserved
0 0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0 0
SU[3:0]
0 0 0 0
SU[3:0]
0 0 0 0
KEY[7:0]
0 0 0 0
SU[3:0]
0 0 0 0
DU[3:0]
0 0 0
0 0 0 0
0 0 0 0
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