Spi Register Map; Table 102. Spi Register Map And Reset Values - ST STM32F207 Series Reference Manual

Advanced arm-based 32-bit mcus
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Serial peripheral interface (SPI)
25.5.10

SPI register map

The table provides shows the SPI register map and reset values.
Offset
Register
SPI_CR1
0x00
Reset value
SPI_CR2
0x04
Reset value
SPI_SR
0x08
Reset value
SPI_DR
0x0C
Reset value
SPI_CRCPR
0x10
Reset value
SPI_RXCRCR
0x14
Reset value
SPI_TXCRCR
0x18
Reset value
SPI_I2SCFGR
0x1C
Reset value
SPI_I2SPR
0x20
Reset value
Refer to
734/1381

Table 102. SPI register map and reset values

Reserved
Reserved
Reserved
Reserved
Reserved
Section 3.3: Memory map
0
Reserved
Reserved
0
0
0
0
Reserved
Reserved
for the register boundary addresses.
RM0033 Rev 9
0
0
0
0
0
0
0
0
0
0
0
0
0
0
DR[15:0]
0
0
0
0
0
0
0
0
0
CRCPOLY[15:0]
0
0
0
0
0
0
0
0
0
RxCRC[15:0]
0
0
0
0
0
0
0
0
0
TxCRC[15:0]
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
RM0033
BR [2:0]
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
I2SDIV
0
0
0
0
1
0

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